Code Generation Options

This section contains descriptions for compiler options that pertain to code generation.

• arch
  Tells the compiler which features it may target, including which instruction sets it may generate.
• ax, Qax
  Tells the compiler to generate multiple, feature-specific auto-dispatch code paths for Intel® processors if there is a performance benefit.
• EH
  Specifies the model of exception handling to be performed.
• fasynchronous-unwind-tables
  Determines whether unwind information is precise at an instruction boundary or at a call boundary.
• fdata-sections, Gw
  Places each data item in its own COMDAT section.
• fexceptions
  Enables exception handling table generation.
• ffunction-sections, Gy
  Places each function in its own COMDAT section.
• fomit-frame-pointer, Oy
  Determines whether EBP is used as a general-purpose register in optimizations.
• Gd
  Makes __cdecl the default calling convention.
• Gr
  Makes __fastcall the default calling convention.
• GR
  Enables or disables C++ Run Time Type Information (RTTI).
• guard
  Enables the control flow protection mechanism.
• Gv
  Tells the compiler to use the vector calling convention (__vectorcall) when passing vector type arguments.
• Gz
  Makes __stdcall the default calling convention.
• hotpatch
  Tells the compiler to prepare a routine for hotpatching.
• m
  Tells the compiler which features it may target, including which instruction sets it may generate.
• m32, m64, Qm32, Qm64
  Tells the compiler to generate code for a specific architecture.
• m80387
  Specifies whether the compiler can use x87 instructions.
• march
  Tells the compiler to generate code for processors that support certain features.
• masm
  Tells the compiler to generate the assembler output file using a selected dialect.
• mauto-arch, Qauto-arch
  Tells the compiler to generate multiple, feature-specific auto-dispatch code paths for x86 architecture processors if there is a performance benefit.
• mbranches-within-32B-boundaries, Qbranches-within-32B-boundaries
  Tells the compiler to align branches and fused branches on 32-byte boundaries for better performance.
• mconditional-branch, Qconditional-branch
  Lets you identify and fix code that may be vulnerable to speculative execution side-channel attacks, which can leak your secure data as a result of bad speculation of a conditional branch direction.
• minstruction, Qinstruction
  Determines whether MOVBE instructions are generated for certain Intel® processors.
• momit-leaf-frame-pointer
  Determines whether the frame pointer is omitted or kept in leaf functions.
• mregparm
  Lets you control the number registers used to pass integer arguments.
• mregparm-version
  Determines which version of the Application Binary Interface (ABI) is used for the regparm parameter passing convention.
• mstringop-inline-threshold, Qstringop-inline-threshold
  Tells the compiler to not inline calls to buffer manipulation functions such as memcpy and memset when the number of bytes the functions handle are known at compile time and greater than the specified value.
• mstringop-strategy, Qstringop-strategy
  Lets you override the internal decision heuristic for the particular algorithm used when implementing buffer manipulation functions such as memcpy and memset.
• mtune, tune
  Performs optimizations for specific processors but does not cause extended instruction sets to be used (unlike -march).
• fcf-protection, Qcf-protection
  Enables Control-flow Enforcement Technology (CET) protection, which defends your program from certain attacks that exploit vulnerabilities. This option offers preliminary support for CET.
• Qcxx-features
  Enables standard C++ features without disabling Microsoft* features.
• Qpatchable-addresses
  Tells the compiler to generate code such that references to statically assigned addresses can be patched.
• Qsafeseh
  Registers exception handlers for safe exception handling.
• regcall, Qregcall
  Tells the compiler that the __regcall calling convention should be used for functions that do not directly specify a calling convention.
• x, Qx
  Tells the compiler which processor features it may target, including which instruction sets and optimizations it may generate.
• xHost, QxHost
  Tells the compiler to generate instructions for the highest instruction set available on the compilation host processor.