Dynamic Linking

Dynamic linking is the simplest method and the most commonly used. It takes full advantage of the dynamic dispatching mechanism in the shared object (SO) libraries ) (see also Intel® IPP Structure). The following table summarizes the features of dynamic linking to help you understand the benefits and drawbacks of this linking method.

**Summary of Dynamic Linking Features**
Benefits	Drawbacks
Automatic run-time dispatch of processor-specific optimizations Enables updates with new processor optimizations without recompile/relink Reduces disk space requirements for applications with multiple Intel IPP-based executables Enables more efficient shared use of memory at run-time for multiple Intel IPP-based applications	The application executable requires access to Intel IPP run-time shared object (SO) libraries ) Not appropriate for kernel-mode/device-driver/ring-0 code Not appropriate for web applets/plug-ins that require very small download A one-time performance penalty when the Intel IPP SOs are first loaded

To dynamically link with Intel IPP, follow these steps:

Include ipp.h in your application. This header includes the header files for all Intel IPP functional domains.
Call IPP functions using normal, undecorated function names.
Link corresponding domain soft links. For example, if you use the function ippsCopy_8u, link to libipps.so.
Make sure that you run ipp/bin/ippvars.sh shell script before using Intel IPP libraries in the current session, or set LD_LIBRARY_PATH correctly. For example, export LD_LIBRARY_PATH =$IPPROOT/lib/<arch>:$LD_LIBRARY_PATH in bash, or setenv LD_LIBRARY_PATH =$IPPROOT/lib/<arch>:${LD_LIBRARY_PATH} in csh.

Optimization Notice
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804

Optimization Notice

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804