Supplied Libraries

The following table lists the types of libraries in Intel IPP and shows examples of the library files supplied.

Types of Libraries of Intel IPP
Library types	Description	Folder location	Example
Dynamic	Shared object libraries include both processor dispatchers and function implementations	ipp/lib/<arch>	libipps.so.7.0 libippsp8.so.7.0
	Soft links to shared object libraries	ipp/lib/<arch>	libipps.so libippsp8.so
Static merged	Contain function implementations for all supported processor types:
	libraries with position independent code (PIC)	ipp/lib/<arch>	libipps_l.a
	(non-PIC libraries*)	ipp/lib/<arch>/nonpic	libipps_l.a
Threaded static merged	Contain threaded function implementations	ipp/lib/<arch>	libipps_t.a
Static emerged	Contain dispatchers for the merged libraries:
	libraries with position independent code (PIC)	ipp/lib/<arch>	libipps_l.a
	(non-PIC libraries*)	ipp/lib/<arch>/nonpic	libipps_l.a

Here <arch> refer to the architecture specific folder.

* - non-PIC libraries are suitable for kernel-mode and device-driver use.

Optimization Notice
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804

Optimization Notice

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804