EncodeChromaDcCoeffsCAVLC

Syntax

IppStatus ippiEncodeChromaDcCoeffsCAVLC_H264_16s(const Ipp16s* pSrc, Ipp8u* Traling_One, Ipp8u* Traling_One_Signs, Ipp8u* NumOutCoeffs, Ipp8u* TotalZeros, Ipp16s* pLevels, Ipp8u* pRuns);

Parameters

pSrc	Pointer to 2x2 block - array of size 4.
Traling_One	The number of “trailing ones” transform coefficient levels in a range [0;3]. This value is calculated by the function.
Traling_One_Signs	Code that describes signs of “trailing ones”. (Trailing_One -1 - i)-bit in this code corresponds to a sign of i-“trailing one” in the current block. In this code 1 indicates negative value, 0 - positive value. This value is calculated by the function.
NumOutCoeffs	The number of non-zero coefficients in block (including “trailing ones”). This value is calculated by the function.
TotalZeros	The number of zero coefficients in block (except “trailing zeros”). This value is calculated by the function.
pLevels	Pointer to an array of size 4 that contains non-zero quantized coefficients of the current block (except “trailing ones”) in reverse scan matrix order. Elements of this array are calculated by the function.
pRuns	Pointer to an array of size 4 that contains runs before non-zero quantized coefficients (including “trailing ones”) of the current block in reverse scan matrix order (except run before the first non-zero coefficient in block, which can be calculated using TotalZeros). Elements of this array are calculated by the function.

Description

The function ippiEncodeChromaDcCoeffsCAVLC_H264_16s is declared in the ippvc.h file. This function calculates some characteristics (Trailing_One, Trailing_One_Signs, NumOutCoeffs, TotalZeros, pLevels, pRuns) of a 2x2 chroma DC block for CAVLC encoding.

This function is used in the H.264 encoder included into Intel IPP Samples. See introduction to H.264.

Optimization Notice
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804

Optimization Notice

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804

Return Values

ippStsNoErr	Indicates no error.
ippStsNullPtrErr	Indicates an error condition if at least one of the specified pointers is NULL.