The manual processor dispatch feature allows you to target processors manually. You write one or more versions of a function that executes only on specified types of Intel® processors, as well as a generic version that executes on other Intel or non-Intel processors, using the cpu_specific and cpu_dispatch keywords. The Intel processor type is detected at run-time, and the corresponding function version is executed. This feature is available only for Intel processors based on IA-32 or Intel® 64 architecture. It is not available for non-Intel processors or for Intel processors based on IA-64 architecture. Applications built using the manual processor dispatch feature may be more highly optimized for Intel processors than for non-Intel processors.
Use the __declspec(cpu_dispatch(cpuid, cpuid,...)) syntax in your code to provide a list of targeted processors along with an empty function body/function stub. Use the __declspec(cpu_specific(cpuid)) in your code to declare each function version targeted at particular type[s] of processors.
The following table lists the values for cpuid:
Argument for cpuid |
Processors |
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core_2nd_gen_avx |
2nd generation Intel® CoreTM processor family with support for Intel® Advanced Vector Extensions (Intel® AVX). |
core_aes_pclmulqdq |
Intel® Core™ processors with support for Advanced Encryption Standard (AES) instructions and carry-less multiplication instruction |
core_i7_sse4_2 |
Intel® Core™ i7 processors with Intel® Streaming SIMD Extensions 4.2 (SSE4.2) instructions |
core_2_duo_sse4_1 |
Intel® 45nm Hi-k next generation Intel® Core™ microarchitecture processors with Intel® Streaming SIMD Extensions 4.1 (SSE4.1) instructions |
core_2_duo_ssse3 |
Intel® Core™2 Duo processors and Intel® Xeon® processors with Intel® Supplemental Streaming SIMD Extensions 3 (SSSE3) instructions |
atom |
Intel® Atom™ processors with Intel® Supplemental Streaming SIMD Extensions 3 (SSSE3) |
pentium_4_sse3 |
Intel® Pentium 4 processor with Intel® Streaming SIMD Extensions 3 (Intel® SSE3) instructions, Intel® Core™ Duo processors, Intel® Core™ Solo processors |
pentium_4 |
Intel® Intel Pentium 4 processors |
pentium_m |
Intel® Pentium M processors |
pentium_iii |
Intel® Pentium III processors |
generic |
Other IA-32 or Intel 64 processors or compatible processors not provided by Intel Corporation |
If no other matching Intel processor type is detected, the generic version of the function is executed. If you want the program to execute on non-Intel processors, a generic function version must be provided. You can control the degree of optimization of the generic function version and the processor features that it assumes.
The cpuid attributes are not case sensitive. The body of a function declared with __declspec(cpu_dispatch) must be empty, and is referred to as a stub (an empty-bodied function).
The following example illustrates how the cpu_dispatch and cpu_specific keywords can be used to create function versions for the 2nd generation Intel Core processor family, for the Intel Core processor family, for the Intel Core 2 Duo processor family, and for other Intel and compatible, non-Intel processors. Each processor-specific function body might contain processor-specific intrinsic functions, or it might be placed in a separate source file and compiled with a processor-specific compiler option.
Example |
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#include <stdio.h> // need to create specific function versions for the following processors: __declspec(cpu_dispatch(core_2nd_gen_avx, core_i7_sse4_2, core_2_duo_ssse3, generic )) void dispatch_func() {}; // stub that will call the appropriate specific function version __declspec(cpu_specific(core_2nd_gen_avx)) void dispatch_func() { printf("\nCode for 2nd generation Intel Core processors with support for AVX goes here\n"); } __declspec(cpu_specific(core_i7_sse4_2)) void dispatch_func() { printf("\nCode for Intel Core processors with support for SSE4.2 goes here\n"); } __declspec(cpu_specific(core_2_duo_ssse3)) void dispatch_func() { printf("\nCode for Intel Core 2 Duo processors with support for SSSE3 goes here\n"); } __declspec(cpu_specific(generic)) void dispatch_func() { printf("\nCode for non-Intel processors and generic Intel processors goes here\n"); } int main() { dispatch_func(); printf("Return from dispatch_func\n"); return 0; } |
Before using manual dispatch, consider whether the benefits outweigh the additional effort and possible performance issues. You may encounter any one or all of the following issues when using manual processor dispatch in your code:
some types of inlining may be disabled
code and executable sizes increase considerably
additional performance overhead may be introduced because of additional function calls
Test your application on all targeted platforms before release.
You can also use the #pragma intel optimize target_arch, to flag those routines in your code that you want to execute on specified types of Intel® processors. This pragma controls the -x or /Qx option at a routine level, overriding the option values specified at the command-line. The pragma uses the same values as the -x or /Qxoption to target processors. The following example illustrates how to use the pragma to target a routine bar() to execute only on Intel® AVX supported processors regardless of what the command-line has specified.
Example |
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#pragma intel optimize target_arch=AVX void bar() { ... } |
Optimization Notice |
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Intel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804 |
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